| 摘要 |
<P>PROBLEM TO BE SOLVED: To provide a system and a method for preventing memory access errors. <P>SOLUTION: The system (20) prevents the memory access errors by using a memory chip (52) and a logic circuit (115). The memory chip (52) has a plurality of memory locations. The logic circuit (115) is external to the memory chip (52) and is configured to receive a signal indicative of whether a received memory address is associated with a detected parity error. Further, the logic circuit (115) is configured to enable the memory chip (52) to access the memory locations based on the memory address when the signal indicates that the memory address is not associated with the detected parity error, and to disable the memory chip (52) from accessing the memory locations based on the memory address when the signal indicates that the memory address is associated with the detected parity error. <P>COPYRIGHT: (C)2004,JPO |
