发明名称 FEEDBACK SHIFT REGISTER CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To generate data after an optional phase shift in a short period of time in an M sequence generation circuit using a feedback shift register. <P>SOLUTION: A one shift circuit 220 calculates data after one shift in an internal state of an m stage flipflop 260, and an n shift circuit 230 calculates data after n shift (n&ge;2) in an internal state of the m stage flipflop 260. The m stage flipflop 260 sequentially holds outputs of the one shift circuit 220 or the n shift circuit 230 after setting an initial value, outputs an internal state corresponding to a shifted M sequence to a latching circuit 270 to make the latching circuit 270 output the external state as an m-bit bus signal. In addition, the internal state is feedbacked to the one shift circuit 220 and the n shift circuit 230. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2003345246(A) 申请公布日期 2003.12.03
申请号 JP20020153241 申请日期 2002.05.28
申请人 NEC ENGINEERING LTD 发明人 KUROSAKI KEIKO;TATEISHI SHUNSUKE
分类号 G06F7/58;G09C1/00;H03K3/84 主分类号 G06F7/58
代理机构 代理人
主权项
地址
您可能感兴趣的专利