Differential current sense amplifier circuit and sense amplifier circuit for evaluating the memory state of a SRAM semiconductor memory cell

摘要

The differential electric current evaluation circuit has differential amplifier (DV) with input portions and input resistance adjustment unit with transistors (MIN,MINB). The input portions and output portions of differential amplifier, are connected with signal lines (BL,BLB) with which transistors (MIN,MINB) of input resistance adjustment unit are connected, respectively. Independent claims are also included for the following: (1) sense amplifier circuit; (2) sense amplifier circuit structure.