| 摘要 |
In a method of reading a memory cell of a memory cell array, electrical potentials are applied to a conductive structure connected to the drain, a conductive structure connected to the source, and the gate of the transistor of a cell to be read. Electrical potential are also applied to a conductive structure connected to the drain, a conductive structure connected to the source, and the gate of the transistor of a reference cell, providing current through the reference cell. The level of resistance to current through the reference cell is chosen by selecting the level of resistance in the conductive structure connected to the source of the transistor of the reference cell.
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