发明名称 |
Semiconductor device, memory system, and electronic instrument |
摘要 |
The present invention provides a semiconductor device including a first gate-gate electrode layer located in a first conductive layer and including gate electrodes of a first load transistor and a first driver transistor and a second gate-gate electrode layer located in the first conductive layer and including gate electrodes of a second load transistor and a second driver transistor. A first drain-drain connecting layer is located in a second conductive layer which is an upper layer of the first conductive layer and connects a drain of the first load transistor with a drain of the first driver transistor. A second drain-drain connecting layer is located in the second conductive layer and connects a drain of the second load transistor with a drain of the second driver transistor. A first drain-gate connecting layer is located in a third conductive layer which is an upper layer of the first and second drain-drain connecting layers and connects the first drain-drain connecting layer with the second gate-gate electrode layer and a stacked contact-conductive section connects the third conductive layer with the first conductive layer and has a structure in which an upper layer conductive section buried in a second interlayer dielectric used to insulate the second conductive layer from the third conductive layer is stacked over a lower layer conductive section buried in a first interlayer dielectric used to insulate the first conductive layer from the second conductive layer.
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申请公布号 |
US6653696(B2) |
申请公布日期 |
2003.11.25 |
申请号 |
US20020068785 |
申请日期 |
2002.02.05 |
申请人 |
SEIKO EPSON CORPORATION |
发明人 |
KARASAWA JUNICHI;KUMAGAI TAKASHI |
分类号 |
H01L21/8244;H01L27/11;H01L29/76;H01L29/94;H01L31/062;H01L31/113;H01L31/119;(IPC1-7):H01L29/76 |
主分类号 |
H01L21/8244 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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