发明名称 CLOCK GENERATOR AND CLOCK CONVERSION CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To solve a problem that a frequency not suitable for a task is often generated with a clock generator which generates clocks of a plurality of frequencies, and that useless power is consumed in that event. <P>SOLUTION: The clock generator includes: a clock generater 11 which generates clocks clk of predetermined frequencies; a counter 13 which operates in synchronization with the clock clk and counts pulses of the clock clk; a comparator 14 which compares the counter value of the counter 13 with the number of pulses cmpd of the clock of a desired frequency freq; and output gates 15, 16 which control the supply and half of the pulse of the clock clk inputted from the clock generation part 11, on the basis of the comparison result obtained with the comparator 14. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2003330569(A) 申请公布日期 2003.11.21
申请号 JP20020138020 申请日期 2002.05.14
申请人 SONY CORP 发明人 MEGURO TETSUMASA
分类号 G06F1/04;G06F1/06;G06F1/08;G06F1/32;H03K5/00;H03K23/64;(IPC1-7):G06F1/04 主分类号 G06F1/04
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