发明名称 Halbleiteranordnung des Harzverkapselungstyps, in dem ein sehr kleiner Halbleiterchip mit Harz versiegelt ist
摘要 A lead of a lead frame cannot be made close to a very small semiconductor chip in view of processing dimensions. If a TAB technique is used to directly connect the semiconductor chip and the lead in order to improve in reliability, a device for forming a bump on an electrode of the chip is required, which increases the cost of investment in equipment. A printed circuit board (33) is formed between the lead (34) and bed (31) and a bonding wire (37) is used to shorten the length of wiring and thus to decrease in cost and improve in reliability. Since an electrode pad (35) of the semiconductor chip (32), the printed circuit board (33), and the lead (34) are connected to each other using the TAB technique, the productivity of semiconductor devices is increased. Using the TAB technique, no bumps are formed anywhere and the cost of investment in equipment is not so increased.
申请公布号 DE69034110(D1) 申请公布日期 2003.11.20
申请号 DE1990634110 申请日期 1990.08.24
申请人 KABUSHIKI KAISHA TOSHIBA, KAWASAKI 发明人 SAWAYA, HIROMICHI
分类号 H01L21/60;H01L23/495;H01L23/50;H01L23/538 主分类号 H01L21/60
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