发明名称 CMOS TRANSISTOR USING CHANNEL JUNCTION AND LOGIC CIRCUIT USING THE SAME
摘要 PURPOSE: A CMOS transistor is provided to be capable of reducing the size of circuits and improving operation speed by using a channel junction instead of a floating node. CONSTITUTION: A semiconductor substrate(10) includes the first and second region(20,30). A P-well(40) is formed at the first region(20) of the substrate. The first junction region(50) is formed in the P-well(40) for fetching the first electrode(110). The second junction region(60) is formed in the second region(30) for fetching the second electrode(120). The first gate oxide layer(70) and the first gate electrode(80) are stacked on the first region(20) to partially overlap the first junction region. The second gate oxide layer(90) and the second gate electrode(100) are stacked on the second region(30) to partially overlap the second junction region. The first channel is formed at a lower of the first gate electrode(80) and the second channel is formed at a lower of the second gate electrode(100), thereby forming a PN junction.
申请公布号 KR20030088763(A) 申请公布日期 2003.11.20
申请号 KR20020026671 申请日期 2002.05.15
申请人 HYNIX SEMICONDUCTOR INC. 发明人 PARK, YEONG SU
分类号 H01L27/092;(IPC1-7):H01L27/092 主分类号 H01L27/092
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