发明名称 Semiconductor device preventing signal delay among wirings
摘要 A plurality of wirings are arranged approximately in parallel. A first amplifier is arranged in one wiring of the two adjacent wirings which are included in the plurality of wirings. The first amplifier is arranged at least at a position which divides the interval of a predetermined distance of one wiring by approximately 1/n (n is an integer of two or more). The first amplifier is constituted by an odd number of inverter circuits.
申请公布号 US6650574(B2) 申请公布日期 2003.11.18
申请号 US20010013393 申请日期 2001.12.13
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 NAMEKAWA TOSHIMASA
分类号 G11C11/41;G11C5/06;G11C7/00;G11C7/10;G11C11/408;G11C11/413;H01L21/82;H01L21/822;H01L21/8242;H01L27/04;H01L27/108;(IPC1-7):G11C7/00 主分类号 G11C11/41
代理机构 代理人
主权项
地址