发明名称 Method of fabricating vias in solder pads of a ball grid array (BGA) substrate
摘要 Disclosed is a method for fabricating vias in solder pads of a ball grid array (BGA) substrate. The substrate is drilled to form the plural vias, and then the interior surfaces of said vias are plated with a copper layer for forming the electrically conductive vias. After the high solid content of the resin is adopted for being plugged into the electrically conductive vias, the both ends of the electrically conductive vias and the upper surface and the lower surface of the substrate are plated with a copper layer. Then said copper layers are etched to form the upper circuit layer and the lower circuit layer and the solder pads. The method in present invention can increase the density of the circuits. Because the both ends of the electrically conductive vias plugged with the resin are very planar, it can be made use of forming a core layer for the built-up fabrication.
申请公布号 US6649506(B2) 申请公布日期 2003.11.18
申请号 US20010939480 申请日期 2001.08.24
申请人 PHOENIX PRECISION TECHNOLOGY CORPORATION 发明人 HSU SHIH-PING
分类号 H01L21/48;H01L23/498;H05K1/11;H05K3/00;H05K3/34;H05K3/42;(IPC1-7):H01L21/44 主分类号 H01L21/48
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