| 摘要 |
A boundary scan cell (100) for use in a circuit having a boundary scan shift register (BSSR) having boundary scan cells associated with pins of the circuit, the cell (100) having a single-bit shift register element (18) and an associated updated latch (20), comprises a logic circuit (106) for controlling the logic state of an associated pin, analog switches (102, 104) connecting the associated pin to analog test buses (AB1, AB2), and logic circuitry (106) for selectively configuring the cell (100) in a parametric test mode in which the cell shift register element controls the analog switches (102, 104), and in a digital test mode in which the cell shift register element controls the logic state of the associated pin (24).
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