发明名称 |
Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof |
摘要 |
A nonvolatile memory device with a reduced size floating gate and an increased coupling ratio is disclosed. The nonvolatile memory device includes two isolation structures protruding above a semiconductor substrate. Two dielectric spacers are disposed on a pair of opposing sidewalls of the two isolation structures. The two dielectric spacers are spaced from one another at a distance that defines a gate width which is beyond lithography limit. A tunnel dielectric and a floating gate are provided on substrate and confined between the two dielectric spacers. The floating gate has a smaller bottom surface area relative to its top surface area and has a surface substantially coplanar with a surface of the isolation structures. On the coplanar surface, an inter-gate dielectric and a control gate are provided. Optionally, a lightly doped region is provided beside the floating gate 118 and within the substrate. A manufacturing method for forming such memory device is also disclosed.
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申请公布号 |
US2003207520(A1) |
申请公布日期 |
2003.11.06 |
申请号 |
US20030446684 |
申请日期 |
2003.05.29 |
申请人 |
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION |
发明人 |
TSENG HORNG-HUEI |
分类号 |
H01L21/8247;H01L27/115;H01L29/423;(IPC1-7):H01L21/823 |
主分类号 |
H01L21/8247 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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