| 摘要 |
A wiring layer is covered with a first organic SOG layer, a reinforcement insulating layer consisting of a silicon oxide film or a silicon nitride film formed by means of a plasma CVD method, and a second organic SOG layer, in this order. A via hole is formed in the first organic SOG layer and the reinforcement insulating layer, and a trench is formed in the second organic SOG layer to correspond to the via hole. A conductive via plug and an electrode pad are embedded in the via hole and the trench, respectively. The second SOG layer is covered with a passivation layer in which a through hole is formed to expose the electrode pad. A wire is connected to the exposed electrode pad in the through hole.
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