发明名称 Interruption control circuit for use in an apparatus having a microcomputer
摘要 A CPU deactivates an A/D converter section before it stops operating in an idle mode. When any one of the keys in key matrices is pushed, the key matrix including the key pushed generates a voltage. The voltage is applied to the A/D converter section and one of buffer circuits. If the voltage is lower than the threshold voltage of the buffer circuit, the output signal of an AND circuit changes, and an interrupt-signal generating circuit generates a signal for releasing the idle mode. In response to this signal, the CPU starts operating and activates the A/D converter section.
申请公布号 US6643785(B1) 申请公布日期 2003.11.04
申请号 US20000666459 申请日期 2000.09.21
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KAMIMURA TOSHIYUKI;TERAYA KOICHI
分类号 G06F1/26;G06F1/32;H04N5/63;(IPC1-7):G06F1/32 主分类号 G06F1/26
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