| 摘要 |
A USB circuit that can prevent phase difference between a signal pair with high precision without the need for strict design conditions. In a preferred embodiment of this USB circuit, the USB controller thereof comprises a flip-flop pair to match the timings of a signal pair output to an output signal line pair and a flip-flop pair to match the timings of a signal pair input from an input signal line pair, and the USB driver thereof comprises a third flip-flop pair to match the timings of a signal pair input from the output signal line pair, and a fourth flip-flop pair to match the timings of a signal pair output to the input signal line pair.
|
