发明名称 Multibit memory point memory
摘要 A ROM including a set of memory points arranged in rows and columns, in which each memory point, formed of a single controllable switch, memorizes an N-bit information, with N>=2. Each column includes 2N conductive lines; each of the two main terminals of each memory point is connected to one of said conductive lines, each information value being associated with a specific assembly of 2<N >connections from among the set of 2<2N >possible connections; and each of N read means is provided to apply a precharge voltage to a chosen group of 2<N-1 >first lines, connect the 2<N-1 >other lines to a reference voltage, select a memory point, read the voltages from the first lines, combine the obtained results to provide an indication of the value of one of the bits of the information contained in the selected memory point.
申请公布号 US6636434(B2) 申请公布日期 2003.10.21
申请号 US20020171607 申请日期 2002.06.14
申请人 DOLPHIN INTEGRATION 发明人 POULLET FREDERIC
分类号 G11C11/56;G11C17/12;(IPC1-7):G11C17/00 主分类号 G11C11/56
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