发明名称 Deep trench isolation for reducing soft errors in integrated circuits
摘要 An integrated circuit having improved soft error protection and a method improving the soft error protection of an integrated circuit are disclosed. The integrated circuit comprises a substrate 72, a transistor formed in the substrate 72, a first region 74 (e.g. a well) formed in the substrate having a first conductivity type, a second region 84 below the first region 74 having a second conductivity type, and a trench formed in the substrate having a depth at least substantially as deep as the well. The trench 70 is filled with a non-conductive material 71 that forms a frame around the transistor, whereby soft errors due to electron-hole pairs caused by ionizing radiation in the frame are substantially eliminated.
申请公布号 US6635551(B2) 申请公布日期 2003.10.21
申请号 US20020147869 申请日期 2002.05.20
申请人 TEXAS INSTRUMENTS INCORPORATED 发明人 ATON THOMAS J.
分类号 H01L21/762;H01L21/8234;(IPC1-7):H01L21/76 主分类号 H01L21/762
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