发明名称 CLOCK SIGNAL REPRODUCING CIRCUIT, RECEIVER AND CLOCK SIGNAL REPRODUCING METHOD
摘要 <P>PROBLEM TO BE SOLVED: To solve the problem that skipping or repeating occurs frequently if not securing a prescribed transmission rate because reproduction processing is performed on the basis of only a PCR (program clock reference) contained in a TS (transport stream) packet, in a conventional clock signal reproducing device for a TS. <P>SOLUTION: A clock signal reproducing circuit comprises a TS header parser 31 for detecting a PCR from a TS, a PCR register 37, a STC (system time clock) counter 38, an STC register 39, a switch 41, and a CPU 14, etc. In this circuit, when the prescribed transmission rate is secured, a latch signal outputted from the parser 31 is transmitted to the register 39 to perform clock signal reproducing processing on the basis of the PCR, and when the prescribed transmission rate is not secured, a latch signal outputted from the CPU 14 is transmitted to the register 39 to perform clock signal reproducing processing on the basis of time information outputted from a timer circuit 20. <P>COPYRIGHT: (C)2004,JPO
申请公布号 JP2003299093(A) 申请公布日期 2003.10.17
申请号 JP20020101256 申请日期 2002.04.03
申请人 SONY CORP 发明人 ADACHI HIROSHI
分类号 H04L7/00;H04N5/44;H04N19/00;H04N19/44 主分类号 H04L7/00
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