| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a MRAM which can read information of memory cells of different addresses connected to the same bit line in arbitrary timing. <P>SOLUTION: A memory cell of an address AD00 is provided with MOS transistors Q1, Q2 and a magnetic tunnel resistance element MR00 between bit lines BL0a and BL0b, gate electrodes of the MOS transistors Q1 and Q2 are connected to word lines WL0a and WL0b. Memory lines ML0 and ML1 are connected commonly to a reference voltage source VR1 through MOs transistors Q3 and Q31 respectively and connected to current sources S1 and S2 with switch respectively. Bit lines BL0a, BL0b, BL1a, and BL1b are connected to input of buffers B1, B4 with switch respectively, and each output is given to a sense amplifier SA1. <P>COPYRIGHT: (C)2004,JPO</p> |
