发明名称 PROGRAMMABLE LOGIC ARRAY CIRCUIT DEVICE
摘要 PURPOSE:To detect that all outputs of a PLA are false, by providing a means which generates all AND of NOT of OR as the output of an OR face. CONSTITUTION:An off-cover line 30 is precharged at the same timing as product term lines 24a-24c and OR face output lines 25a-25c. Inputs 01-03 and OIL of an output latch 29 are obtained by logically negating OR face output lines 25a-25c and the off-cover line by inverters 34a-34c and 37. The off-sover line 30 is discharged only when all output lines 25a-25c are not discharged at all, and all product term lines 24a-24c are discharged in this case. This case corresponds to the fact that outputs of all data output terminals 26a-26c are false. Thus, it is detected that all data outputs are false.
申请公布号 JPS64816(A) 申请公布日期 1989.01.05
申请号 JP19870155834 申请日期 1987.06.23
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 EDAMATSU JUICHI
分类号 H03K19/177 主分类号 H03K19/177
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