| 摘要 |
The invention relates to a processor-memory system (1) comprising a processor (2), a data bus (3) and a memory unit. The memory unit has a plurality of working memories (4, 5, 6) and a plurality of cache memories (7, 8). A cache memory (7, 8) is assigned at least partly to the working memories (4, 6). The data bus (3) is arranged between the processor (2) and the memory unit. |
