发明名称 Pattern formation process for an integrated circuit substrate
摘要 A pattern formation process for an integrated circuit substrate, which is not employing the conventional method of filling resin material directly in via filling process but adapting the metal spray method, the metal vapor deposition method or any combination thereof to form the pattern including circuits and pads and stuff the vias and the through holes.
申请公布号 US2003190799(A1) 申请公布日期 2003.10.09
申请号 US20020211700 申请日期 2002.08.02
申请人 KUNG MORISS;HO KWUN-YAO 发明人 KUNG MORISS;HO KWUN-YAO
分类号 C23C4/18;H05K3/40;H05K3/46;(IPC1-7):H01L21/476;B05D5/12;H05K1/11 主分类号 C23C4/18
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