SYNCHRONOUS SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE: A synchronous semiconductor memory device is provided to improve command processing performance by advancing a start time of a column command in the synchronous semiconductor memory device having additive latency. CONSTITUTION: In a device, the first address strobe generation unit(40) which generates the first column address strobe pulse in response to an internal clock corresponding to an external clock edge after a column command is applied. The second address strobe pulse generation unit(41) generates the second column address strobe pulse in response to a delay locked loop clock corresponding to the external clock edge after additive latency after the column command is applied. And a multiplexing unit(42) outputs the first or the second column address strobe pulse selectively according to the existence of additive latency.