发明名称 System for packet communication where received packet is stored either in a FIFO or in buffer storage based on size of received packet
摘要 An interface apparatus provides a connection between a host having an IEEE 1394 input/output port and a mass storage device having an ATA input/output port. A receive FIFO and a transmit FIFO within the interface apparatus operates to store small-size packets, or operates to store the buffer address of large-size packets, as the small and large size packets are respectively received from the host or transmitted to the host. In both the host receive and host transmit modes of operation of the interface apparatus, the small-size packets are found in the receive FIFO or the transmit FIFO, whereas the data content of large-size packets is stored in the buffer as the corresponding buffer address is stored in the receive FIFO or the transmit FIFO.
申请公布号 US6631484(B1) 申请公布日期 2003.10.07
申请号 US19980052714 申请日期 1998.03.31
申请人 LSI LOGIC CORPORATION 发明人 BORN RICHARD M.
分类号 G06F12/02;G06F13/40;(IPC1-7):G06F12/02 主分类号 G06F12/02
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