发明名称 |
Circuit structure and semiconductor integrated circuit |
摘要 |
A bypass capacitor having a given capacitance is arranged on the power/ground line adjacently to a driver circuit in a chip to reduce an effect of transient phenomenon at switching. The capacitance of the bypass capacitor is preset so as to be larger than a parasitic capacitance of the driver circuit to prevent the characteristic impedance of the power/ground line from being higher than the characteristic impedance of internal wiring.
|
申请公布号 |
US2003184311(A1) |
申请公布日期 |
2003.10.02 |
申请号 |
US20030348896 |
申请日期 |
2003.01.23 |
申请人 |
|
发明人 |
OTSUKA KANJI;SUGA TADATOMO;USAMI TAMOTSU |
分类号 |
H01L21/822;H01L21/82;H01L23/522;H01L23/64;H01L27/04;H01L27/08;H03K19/00;H03K19/0175;(IPC1-7):H01H31/04 |
主分类号 |
H01L21/822 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|