发明名称 Method for forming an improved metal silicide portion in a silicon-containing conductive region in an integrated circuit
摘要 In one aspect of the present invention, a layer stack comprising at least three material layers is provided on a silicon-containing conductive region to form a silicide portion on and in the silicon-containing conductive region, wherein the layer next to the silicon provides the metal atoms for the chemical reaction, and wherein the following layers provide for a sufficient inertness of the chemical reaction. The method may be carried out as an in situ method, thereby significantly improving throughput and deposition tool performance compared to typical prior art processes, in which at least two deposition chambers have to be used.
申请公布号 US2003186523(A1) 申请公布日期 2003.10.02
申请号 US20020282665 申请日期 2002.10.29
申请人 WIECZOREK KARSTEN;KAHLERT VOLKER;HORSTMANN MANFRED 发明人 WIECZOREK KARSTEN;KAHLERT VOLKER;HORSTMANN MANFRED
分类号 H01L21/28;H01L21/285;H01L21/336;H01L29/49;(IPC1-7):H01L21/20;H01L21/320;H01L21/476 主分类号 H01L21/28
代理机构 代理人
主权项
地址