发明名称 Memory architecture with refresh and sense amplifiers
摘要 An improved memory architecture is described. The memory architecture includes separately controlled refresh and sense amplifiers to enable a memory access and refresh cycle simultaneously.
申请公布号 US6628541(B2) 申请公布日期 2003.09.30
申请号 US20020131364 申请日期 2002.04.24
申请人 INFINEON TECHNOLOGIES AKTIENGESELLSCHAFT 发明人 JAIN RAJ KUMAR
分类号 G11C11/405;G11C11/406;G11C11/4091;H01L21/8242;H01L27/108;H01L27/11;(IPC1-7):G11C11/40 主分类号 G11C11/405
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