发明名称 |
Method and apparatus for displaying eye diagram on an error performance analyzer |
摘要 |
A method and apparatus for displaying an eye diagram on an error performance analyzer are disclosed. A first bit sequence is received and compared with a second bit sequence, the first bit sequence and the second bit sequence being substantially similar. For each delay increment for an entire clock period a bit error rate (BER) curve is constructed. The BER curve is then used to locate the bit voltage or bit voltage spread for the 0-bit and the 1-bit for a particular delay. This is repeated a predetermined number of times to cover an entire period. Then, the bit voltages or bit voltage spreads are displayed as an eye diagram.
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申请公布号 |
US6629272(B1) |
申请公布日期 |
2003.09.30 |
申请号 |
US20000711264 |
申请日期 |
2000.11.09 |
申请人 |
AGILENT TECHNOLOGIES, INC. |
发明人 |
JUNGERMAN ROGER LEE |
分类号 |
G01R31/317;G01R31/319;H04L1/20;(IPC1-7):G01R31/318 |
主分类号 |
G01R31/317 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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