发明名称 |
Automatic frequency tuning circuit |
摘要 |
A multiplier circuit multiplies a first output signal (fVCO) that has been generated by a conventional automatic phase-controlled loop circuit with a second output signal (fIF+fref) that has been generated by a phase-locked loop circuit based on a reference signal (fref). A phase difference detector circuit and an edge detector circuit receive a result of this multiplication, and carry out an edge detection (such as, for example, a pulse density corresponding to a frequency difference between a video intermediate frequency fIF and the first output signal fVCO). An automatic frequency tuning voltage is generated based on a result of this edge detection.
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申请公布号 |
US6628345(B1) |
申请公布日期 |
2003.09.30 |
申请号 |
US20000708446 |
申请日期 |
2000.11.09 |
申请人 |
MITSUBISHI DENKI KABUSHIKI KAISHA |
发明人 |
TACHIBANA MASANORI;SUZUKI JUNJI |
分类号 |
H03J7/02;H03J7/06;H04N5/44;H04N5/455;H04N5/50;(IPC1-7):H04N5/50 |
主分类号 |
H03J7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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