METHOD OF FABRICATING PCB FOR SEMICONDUCTOR PACKAGE HAVING TAILLESS PATTERN

摘要

PURPOSE: A method of fabricating a PCB(Printed Circuit Board) for semiconductor package having a tailless pattern is provided to reduce the electric noise due to a tail of a finger by forming necessary patterns without using a plating lead line. CONSTITUTION: A dry film is coated on both sides of a substrate including a copper layer. The first imaging process is performed to expose the copper layer by exposing and developing the substrate. The first etching process is performed to form a bonding finger by removing the exposed copper layer. The first strip process is performed to remove the dry film. The second imaging process is performed to expose the copper layer for forming the bonding finger, a circuit pattern, and a solder ball land by coating, exposing and developing the dry film. A nickel/gold plating process is performed to form a nickel/gold plating layer on the copper layer for forming the bonding finger, the circuit pattern, and the solder ball land. The second strip process is performed to remove the dry film. The second etching process is performed to remove the copper layer without the nickel/gold plating layer. A solder masking process is performed to form a plastic layer on the remaining region except for a soldering region.