发明名称 BIAS CIRCUIT AND A/D CONVERTER
摘要 PROBLEM TO BE SOLVED: To provide a bias circuit for outputting a desired bias voltage by excluding an influence caused by a dispersion in element performance occurring in the case of production and an A/D converter equipped with the relevant bias circuit. SOLUTION: Input voltages VEP and VEN are generated to make a difference a saturated voltage Veff on the basis of the bias voltage VB fed back and inputted by a Veff detection circuit 1, a four-input operational amplifier 8 inputs the input voltages VEP and VEN generated by the Veff detecting circuit 1 and generates the bias voltage VB by using reference voltages VERP and VERN inputted form the outside. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003273657(A) 申请公布日期 2003.09.26
申请号 JP20020074862 申请日期 2002.03.18
申请人 MITSUBISHI ELECTRIC CORP 发明人 MATSUMOTO OSAMU;ITO MASAO;SUWA NAOKO
分类号 H03M1/36;G05F3/20;H03F1/30;H03F3/45;(IPC1-7):H03F1/30 主分类号 H03M1/36
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