发明名称 HETERO-JUNCTION BIPOLAR TRANSISTOR
摘要 PROBLEM TO BE SOLVED: To reduce a driving voltage of an HBT, the parasitic resistance of each layer, and electrode contact resistance in processing a device by using GaAs for a substrate. SOLUTION: A hetero-junction bipolar transistor has a laminated structure comprising an InGaAs sub-collector layer 2, an InGaAs collector layer 3, an InGaAs base layer 4, an InGaP emitter layer 5, an InGaAs emitter contact layer 6, and InGaAs non-alloy contact layers 7, 8 arranged in this order from the substrate side. GaAs is used for the substrate and a buffer layer 1, e.g. in the form of an InGaAs gradient composition layer, is provided between the GaAs substrate and the sub-collector layer 2 to alleviates lattice mismatching between them. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003273118(A) 申请公布日期 2003.09.26
申请号 JP20020072359 申请日期 2002.03.15
申请人 HITACHI CABLE LTD 发明人 SATO SHIGEYOSHI;OTOGI YOHEI;TSUJI TAKAYUKI
分类号 H01L21/331;H01L29/737;(IPC1-7):H01L21/331 主分类号 H01L21/331
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