| 摘要 |
The present invention provides a residue computing device on a Galois Field GF(2 m), for calculating a residue R of a product of a multiplier factor X and a multiplicand Y under a modulo Z, which comprises a gate G1 for allowing the multiplier factor X to pass therethrough when a leading bit MSB of the multiplicand Y is 1, an adder ADD for adding a temporary residue R' and a value obtained by the passage, a gate G2 for allowing the modulo Z to pass therethrough when a leading bit MSB of a summed value SUM of the adder is 1, and a subtractor SUB for subtracting the modulo Z from the summed value SUM of the adder when the leading bit MSB of the summed value SUM is 1, wherein a process for setting a value obtained by shifting a subtracted value of the subtractor by one bit, as the temporary residue R' on the basis of the next clock is repeatedly performed for each clock to thereby calculate the residue R.
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