SEMICONDUCTOR MEMORY DEVICE AND CONTROL METHOD OF SEMICONDUCTOR MEMORY DEVICE

摘要

A power supply of a relatively low voltage (VDD) is used to drive a cell core part (20) and its peripheral circuit (10). A boost voltage (VBOOST) to be supplied to control signals of word lines (15) and the like of the cell core part (20) is a constant voltage independent of the power supply voltage (VDD). Sense amplifiers (14) amplify the higher side voltage of bit lines (16) up to the power supply voltage (VDD). A circuit for generating signals for defining the transition timing of the control signals from the peripheral circuit (10) to the cell core part (20) and/or defining the pulse width of the control signals is implemented by use of a delay circuit (11) having a characteristic to shorten the delay time of the signals in response to a reduction in the supplied power supply voltage.