发明名称 Method and apparatus for dynamically controlling the performance of buffers under different performance conditions
摘要 According to one aspect of the invention, a method is provided in which an input signal is received at a first node of a buffer circuit. The propagation of the input signal from the first node to a second node in the buffer circuit is delayed by a delay period based upon a first control input. The delay period is adjusted by a factor based upon a second control input.
申请公布号 US6624655(B2) 申请公布日期 2003.09.23
申请号 US20020315973 申请日期 2002.12.09
申请人 INTEL CORPORATION 发明人 MANDAL SUBRATA;JAHAN MIRZA
分类号 H03K5/00;H03K5/13;H03K19/003;(IPC1-7):H03K17/16;H03H11/26 主分类号 H03K5/00
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