发明名称 |
Using a suggested solution to speed up a process for simulating and correcting an integrated circuit layout |
摘要 |
One embodiment of the invention provides a system for speeding up an iterative process that simulates and, if necessary, corrects a layout of a target cell within an integrated circuit so that a simulated layout of the target cell matches a desired layout for the target cell. The system operates by determining if the target cell is similar to a preceding cell for which there exists a previously calculated solution. If so, the system uses the previously calculated solution as an initial input to the iterative process that produces the solution for the target cell.
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申请公布号 |
US2003177465(A1) |
申请公布日期 |
2003.09.18 |
申请号 |
US20020098714 |
申请日期 |
2002.03.15 |
申请人 |
NUMERICAL TECHNOLOGIES, INC. |
发明人 |
MACLEAN KEVIN D.;STURGEON ROGER W. |
分类号 |
G06F17/50;(IPC1-7):G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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