Low power memory design with asymmetric bit line driver

摘要

A register file design having an asymmetric bit line driver is provided. More specifically, the register file design uses a memory element that has a footer device that facilitates the discharge/charging of a bit line through a pass device, where a width of the footer device is greater than a width of the pass device. Further, a method for performing low power memory operations using asymmetric bit line drivers is provided.