发明名称 |
SINGLE ELECTRON TRANSISTOR HAVING SELF-ALIGNED TRENCH AND FABRICATING METHOD OF THE SAME |
摘要 |
A single electron transistor having a self-aligned trench and a fabricating method thereof are provided to form a tunneling barrier irrelevant to a voltage applied to a gate by forming self-aligned trenches at both sides of the gate. Source and drain regions(22a,24a) are formed on a single crystal silicon layer of an SOI substrate to be separated from each other. A channel region defined by a predetermined small pattern is between the source and drain regions. A gate dielectric(30) is formed on an upper portion of the channel region. A gate(40) is formed on an upper portion of the gate dielectric. A trench(70) is self-aligned at both sides of the gate to be formed in a thickness direction of the channel region. LOCOS dielectric layers(60) are respectively formed on upper portions of the source and drain regions. A dielectric sidewall spacer is formed an upper portion of an end of each LOCOS dielectric layer in parallel with the trench.
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申请公布号 |
KR100800508(B1) |
申请公布日期 |
2008.02.04 |
申请号 |
KR20060135425 |
申请日期 |
2006.12.27 |
申请人 |
SEOUL NATIONAL UNIVERSITY INDUSTRY FOUNDATION |
发明人 |
PARK, BYUNG GOOK;KIM, JIN HO |
分类号 |
H01L29/775 |
主分类号 |
H01L29/775 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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