METHOD OF FORMING SEMICONDUCTOR DEVICE PATTERN

摘要

A method for forming a pattern of a semiconductor device is provided to avoid a leakage current of a floating gate electrode by generally reducing strong tensile stress working on a floating gate conduction layer pattern. A gate insulation layer and a floating gate conduction layer are formed on a semiconductor substrate(100). The semiconductor substrate, the floating gate conduction layer and the gate insulation layer are etched to form a floating gate conduction layer pattern, a gate insulation layer pattern and a trench(106). A first insulation layer(108) is formed on the resultant structure to fill the trench and cover the floating gate conduction layer pattern. A second insulation layer(110) is formed on the first insulation layer. The first insulation layer is an SOG(spin on glass) layer including a polysilanzane-based material, and the second insulation layer is a layer including compressive stress. The process for forming the first insulation layer can include a soft-bake process and an annealing process that are performed on the first insulation layer.