发明名称 |
Self-aligned copper plating/CMP process for RF lateral MOS device |
摘要 |
A method of fabricating an RF lateral MOS device, comprising the following steps. A substrate having a gate oxide layer formed thereover is provided. A first layer of polysilicon is formed over the gate oxide layer. A second layer of material is formed over the polysilicon layer. The polysilicon and the second layer of material are patterned to form a gate having exposed sidewalls with the gate having a lower patterned polysilicon layer and an upper patterned second material layer. Sidewall spacers are formed on the exposed sidewalls of the gate. The upper patterned second material layer of the gate is removed to form a cavity above the patterned polysilicon layer and between the sidewall spacers. A planarized copper plug is formed within the cavity.
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申请公布号 |
US6620663(B1) |
申请公布日期 |
2003.09.16 |
申请号 |
US20010859364 |
申请日期 |
2001.05.18 |
申请人 |
EPISIL TECHNOLOGIES, INC. |
发明人 |
SUNE CHING-TZONG |
分类号 |
H01L21/336;H01L21/60;H01L21/74;H01L29/417;H01L29/78;(IPC1-7):H01L21/338 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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