| 摘要 |
In a shift register having stages each formed from three to six NMOS transistors, a transistor, which outputs an output signal when an ON voltage is applied to the gate, outputs an output signal from the source. Simultaneously, the gate voltage is increased by the parasitic capacitance between the gate and source. For this reason, the voltage of the output signal rises, and the output signal output from each stage does not attenuate.
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