发明名称 |
Semiconductor device and method of manufacturing the same |
摘要 |
A negative buffer layer and a positive collector layer are formed on a side of one surface of a semiconductor substrate. The positive collector layer is set to have a low dose amount and set shallow so that a low injection efficiency emitter structure is realized. Break down voltage of a power device is controlled by a thickness of a drift layer. A positive base layer, a negative emitter layer and a positive base contact layer are formed on a side of the other surface of the semiconductor substrate. A negative low resistant layer reduces a junction FET effect. An emitter electrode comes into contact with the negative emitter layer and the positive base contact layer. A collector electrode comes into contact with the positive collector layer. A gate electrode is formed on a gate insulating film above a channel region on a surface portion of the positive base layer.
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申请公布号 |
US6620653(B2) |
申请公布日期 |
2003.09.16 |
申请号 |
US20010961361 |
申请日期 |
2001.09.25 |
申请人 |
KABUSHIKI KAISHA TOSHIBA |
发明人 |
MATSUDAI TOMOKO;HATTORI HIDETAKA;NAKAGAWA AKIO |
分类号 |
H01L29/73;H01L21/331;H01L21/8234;H01L27/04;H01L27/06;H01L27/12;H01L29/08;H01L29/10;H01L29/423;H01L29/739;H01L29/78;(IPC1-7):H01L21/332;H01L29/74;H01L31/111 |
主分类号 |
H01L29/73 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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