发明名称 JITTER DETECTING CIRCUIT, RECEIVING CIRCUIT INCLUDING THE SAME, AND COMMUNICATION SYSTEM
摘要 <P>PROBLEM TO BE SOLVED: To provide a control system which makes a reception sensitivity control parameter determining the reception sensitivity of an optical receiving circuit automatically follow up an optimum position by using the jitter quantity of a binary equalized data signal obtained by binarizing a received signal as a parameter representing the received signal quality. <P>SOLUTION: The binary equalized data signal outputted from a limiter amplifier 4 and a clock extracted by a clock extracting circuit 6 are inputted to a jitter detecting circuit 7. The jitter detecting circuit 7 outputs a voltage corresponding to the jitter quantity of the binarized equalized data signal. A control circuit 8 receives the output of the jitter detecting circuit 7, performs arithmetic processing by using a DSP, etc., and controls the identification voltage Vth 9 of the limiter amplifier 4 so that the jitter quantity (the output of the jitter detecting circuit 7) of the binary equalized data signal becomes minimum. <P>COPYRIGHT: (C)2003,JPO
申请公布号 JP2003258924(A) 申请公布日期 2003.09.12
申请号 JP20020055136 申请日期 2002.03.01
申请人 NEC CORP 发明人 NOGUCHI SHIGESANE;OGISO CHIHARU
分类号 H04B10/07;H04B10/2507;H04B10/524;H04B10/556;H04B10/564;H04B10/58;H04L1/20;H04L7/02;H04L25/02;H04L25/03 主分类号 H04B10/07
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