IMPROVED RAISED EXTENSION STRUCTURE FOR HIGH PERFORMANCE CMOS

摘要

In a process of fabricating on a substrate a CMOS semiconductor device having a gate electrode, a raised source, and a raised drain, the improvement comprising further incorporating a raised extension, comprising: providing a silicon surface on an insulator layer; proving a gate adjacent to an intended source/drain region; providing an offset spacer adjacent to the gate; growing a source/drain region by selective epitaxy; forming an extension with one or more dopants by ion implantation; and forming a hdd spacer.