| 摘要 |
A semiconductor integrated circuit related to the present invention comprises a logic circuit, and a mode-switching circuit. The logic circuit has a multiplicity of logic elements, which are driven by a driving voltage applied from a dummy power supply line. The mode-switching circuit, during an active mode, supplies to the dummy power supply line a first electric potential for driving a logic element, and, during a sleep mode, supplies to the dummy power supply line a second electric potential, which is higher than zero volts, and lower than a first electric potential. In a first preferred embodiment, a second electric potential is set to a value such that it is possible to reduce logic circuit OFF leakage current during a sleep mode, and to shorten the time for transitioning from a sleep mode to an active mode. In a second preferred embodiment, a second electric potential is set at a value, which reduces logic circuit OFF leakage current during a sleep mode, and at which a latch and flip-flop inside a logic circuit do not lose held data during a sleep mode.
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