| 摘要 |
A method and apparatus for building a memory module using improved patching schemes comprises, mounting multiple primary and secondary memory parts on a mufti-layer circuit board, positioning I/O bit line patching networks adjace nt to the primary and secondary memory parts, matching read/write control signa ls for primary and secondary memory parts which share I/O bit line patching networks, testing primary and secondary memory parts to identify non-operabl e I/O lines, and patching any non-operable I/O line of a primary memory part b y replacing it with a fully operable I/O line of its associated backup memory part. The method and apparatus include mufti-layer circuit boards which utilize 2-to~ 1, 4-to-1, and 8-to-1 patching configurations. |
