| 摘要 |
PROBLEM TO BE SOLVED: To increase an interface processing speed by forming a large bus between a display processor and a memory and to increase speed in a graphic and video display by controlling and restraining consumption power in a chip, in a graphic and video display system of a computer. SOLUTION: This single chip frame buffer comprises a dynamic random access memory (DRAM) for storing at least one of graphic pixel data and video pixel data, and a pixel data unit (PDU) for processing the pixel data, and is integrated into the same integrated circuit (IC) chip as the DRAM. The IC chip further comprises a parallel bus for transferring blocks of the pixel data at the same time from the DRAM to the PDU. The PDU processes the pixel data blocks for displaying the processed pixel data. COPYRIGHT: (C)2003,JPO
|
