发明名称 Semiconductor device
摘要 The well voltage of a CMOS circuit having low-threshold-voltage MOSFETs is controlled when the power supply is turned on, during normal operation, and when the supply voltage is cut off. The CMOS circuit can thus operate stably with lower power consumption, because latching-up is reduced when the supply voltage is applied to the CMOS circuit or when the supply voltage is cut off, and subthreshold current is decreased during normal operation.
申请公布号 US2003155962(A1) 申请公布日期 2003.08.21
申请号 US20030385493 申请日期 2003.03.12
申请人 HITACHI, LTD. 发明人 ITOH KIYOO;MIZUNO HIROYUKI
分类号 G05F3/20;G11C5/14;G11C11/407;G11C11/408;H01L21/8238;H01L27/092;H02M3/07;H03K17/08;H03K17/22;H03K19/00;H03K19/003;H03K19/0948;(IPC1-7):H03K3/01 主分类号 G05F3/20
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