发明名称 ANALOG SWITCH CIRCUIT
摘要 PROBLEM TO BE SOLVED: To surely suppress flowing of an excessive current in an element from an input side in an analog switching circuit. SOLUTION: A well potential NW of a PMOS P1 of the analog switch 10 is controlled by a well potential control circuit 30. The circuit 30 is provided with a PMOS P2 and an NMOS N2, wherein mutual gates and mutual drains are connected, and a well potential NW is supplied form the drains. The P2 receives an input AIN of the analog switch by its source, a source and a gate of the N2 are connected, and the source receives a power source potential VDD of the analog switching circuit. When the power source VDD is off, the well potential NW is supplied from the input AIN, and potential difference is not caused between the input AIN and the well. COPYRIGHT: (C)2003,JPO
申请公布号 JP2003229748(A) 申请公布日期 2003.08.15
申请号 JP20020026567 申请日期 2002.02.04
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 MAEDE MASATO;HIROSE MASAYA
分类号 H01L21/822;H01L27/04;H03K17/16;H03K17/687;(IPC1-7):H03K17/16 主分类号 H01L21/822
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