| 摘要 |
A phase comparator is disclosed that can provide a phase comparison result at high speed that essentially does not vary according a power source voltage, ambient temperature and/or manufacturing process conditions, or the like. A phase comparator (10) may include one-shot pulse generating units (14 and 24) that output one-shot pulses according to input data signal DAT and clock signal CLK, respectively. An R-S flip-flop (16) can receive one-shot pulses from one-shot pulse generating units (14 and 24) at set and reset inputs, respectively. An output flip-flop (17) can select between an output signal of R-S flip-flop (16) and a delay signal "a8" generated from input data signal DAT, and latch such a result according to a delayed clocks signal CLK.
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